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The present invention relates to a high efficiency MOS field effect transistor.
2. Description of the Prior Art
The conventional MOS transistor has a channel width W and an effective channel length L. The figure W/L is called the packing ratio of the MOS transistor, and it determines the drain current.
The typical MOS field effect transistor is made by depositing an N.sup.+ polysilicon gate on a P.sup.- substrate, and forming P.sup.+ impurity regions on both sides of the gate. FIG. 1(a) is a view showing an N type MOS transistor, and FIG. 1(b) is a view showing a P type MOS transistor.
In the P type MOS transistor shown in FIG. 1(b), P
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